The present invention relates to semiconductor fuses and antifuses and, more specifically, to an improved antifuse.
Various semiconductor fuses and antifuses are known in the art. These devices, particularly fuses, are typically used to store data. Conventional fuses operate such that they have a low resistance when initially fabricated and a dramatically increased resistance by application of a sufficient pulse of energy to cause the fuse to fail. This type of technology is often used, for example, in programmable read-only memory (PROM) devices. The programming is achieved by applying a sufficient current to desired ones of the fuses to cause those fuses to fail, thus permanently storing data, e.g., blown fuse=1, closed fuse=0.
In contrast to fuses (which have low resistance in an initial state), antifuses typically have a larger resistance in an initial state and less resistance in a xe2x80x9cblownxe2x80x9d or activated state. Antifuses are also used for data storage. One prior art antifuse structure is that of ACTEL and this structure consists of a thin oxide/nitride/oxide (ONO) layer sandwiched between a heavily doped n+ diffused region and a heavily doped n+ polysilicon electrode. The presence of the ONO layer isolates the electrodes and thus the structure has a large resistance as fabricated. By applying a sufficiently large voltage pulse to this structure, the ONO dielectric will break down leading to a large current flow through the dielectric. This in turn causes localized heating and the resultant formation of a short between the electrodes. Once this short has formed, the resistance of the structure typically drops from greater than 10,000 Ohms to approximately 100 Ohms, depending on the current allowed to flow during the fuse programming.
Another prior art antifuse is disclosed in U.S. Pat. No. 5,572,050 issued to Cohen. This antifuse includes a heating element beneath a pair of electrodes separated by a thermally transformable dielectric material. Applying current to the heating element causes the transformable dielectric to melt and break down which permits formation of a permanent link that programs the antifuse.
Both of the above described antifuse structures rely on a dielectric material between the electrodes to provide an initial resistance value. Dielectric antifuse embodiments are disadvantageous, amongst other reasons, in that they require at least four electrodes, two to program and two to read. A need exists for an antifuse that requires fewer electrodes.
Another disadvantageous aspect of prior art antifuses is that when used with other circuitry (i.e., fabricated on the same die), the dielectric-based antifuse requires significant additional processing, including deposition (or growth) of appropriate dielectric material. A need thus exists for a semiconductor fuse/antifuse that can be manufactured in an efficient manner.
Yet another disadvantageous aspect of prior art antifuses is that they require a significantly large programming signal. A lower power signal for programming and reading are advantages in that they lead to reduced physical stress and more efficient energy use.
Needs also exist for a fuse or antifuse device that has enhanced structural integrity (i.e., it can withstand thermal stress, corrosive ink and other deleterious forces) and a fuse or antifuse that has tri-state properties.
Accordingly, it is an object of the present invention to provide a semiconductor fuse or antifuse that is programmable and readable with the same two electrodes.
It is another object of the present invention to provide a semiconductor fuse/antifuse with enhanced structural integrity.
It is another object of the present invention to provide such a semiconductor fuse/antifuse that can be used and efficiently fabricated in a printhead environment.
It is another object of the present invention to provide a tri-state fuse/antifuse device.
And it is yet another object of the present invention to provide a low power fuse/antifuse device.
These and related objects of the present invention are achieved by use of a semiconductor antifuse device as described herein.